Most large scale integrated circuits (ICs) are presently packaged in plastic or ceramic packages with metal leads extended therefrom for soldering to a printed circuit (PC) board or for insertion into a socket. Typically, these IC packages are configured as dual-in-line or quad-flat packages. In most instances only a single IC is contained within a package, although multiple chips are sometimes contained within a package. The circuit density resulting from this packaging technology is not very great since the ceramic or plastic package consumes relatively large areas of the mounting surface, usually a printed circuit board, particularly if a socket is used.
Moreover, printed circuit boards, like everything else in electronics, are getting smaller, faster and denser. A more compact packaging technology is needed when mounting area is limited or when speed considerations dictate that circuit elements be closely spaced. One such technology comprises the use of a cofired ceramic substrate onto which ICs in an unpackaged form are directly attached to the ceramic mounting surface and are wire bonded to conductive areas on the mounting surface, or are inverted and connected directly to metallized areas on the ceramic mounting surface by, for example, a solder-bump technique. This multiple chip module (MCM) technology has several limitations, however. Interconnecting multiple ICs on a single ceramic mounting surface requires deposition of a metallic material in a pattern which desirably avoids cross-overs. Furthermore, the deposition of metallic conductors of extremely fine resolution is difficult on many surfaces. Multi-layered interconnections are also possible but are sometimes prohibitively expensive and have limited thermal power dissipation capability under air cooling. Direct chip attach has a further limitation of no burn-in capability before module assembly and is difficult to repair after board mounting. Additionally, if components, whether active or passive, are necessary to the circuit, discrete components must be used with their attendant problems of size and mounting mechanisms.
Nevertheless, the advent of MCMs offers distinct advantages in the packaging of ICs. Time delay between chips is less; electrical noise and cross talk are less; and size is less. The chips used can be bigger, and the I/O lead counts have greatly increased per multiple chip module. Despite their various advantages, however, current MCMs have their own set of problems. Thermal management problems have become huge. Heat generated from multiple devices must be removed. As gates are crowded ever more densely on a chip, the entire thermal path, from die to die-attach to substrate to heat sink, should be taken into account. Single crystal silicon and high thermal conductivity ceramics such as aluminum nitride and silicon carbide have heat transfer and thermal averaging capabilities better than traditional ceramic and printed-circuit board materials. Temperature gradations also strongly influence the reliability of solder, wire bond, and electrical connection. In effect, to achieve a successful MCM design, a balance must be struck between materials having individually the most effective thermal conductivity and materials having as a group similar coefficients of thermal expansion.
Traditionally, all dice are probed individually before assembly, while critical units are burned in under accelerated aging conditions to minimize the risk of subsequent system failure. Burn-in is performed to screen out weak devices, and packaged devices rather than bare chips are normally burned-in. Most burn-in failures are device or die related due to weak gate oxide. Adapting burn-in to MCMs, this process should be performed at the packaged module level. The drawback in module level burn-in is that a percentage with die in the module will fail, and replacement of another good die has to be performed by proper removing procedure.
Another MCM approach interconnects bare chips not in the X-Y plane but along the Z-axis. Three dimensional packaging offers higher memory density and less required interconnect density than planar multiple chip substrates. Consequently, connection systems that link MCMs, discretes, and passives are expected to grow in the Z-direction, orthogonal to the substrate. Three-dimensional packaging of ICs offers advantages in numerous fields. For example, it can be useful in supercomputer memories where speed and densification are important, or in large cache memories where access time and densification are critical.
One method of interconnecting bare chips forms a cube of stacked chips. Chips are individually interconnected on a thin film identical to a TAB film by means of gold wires prior to cubing. After passing electrical testing and burn-in, they are then glued on top of one another with TAB film. A major disadvantage to this configuration is limited heat dissipation. Furthermore, once this cube of chips is formed and mounted onto a substrate, rework of subsequent chip failure is highly impractical, so redundant chips are included in the stack which adds to the overall cost of the module.
An ultradense MCM would ideally incorporate the planar multi-chip module with the three-dimensional approach. Stacking of Pin Grid Arrays (PGAs) to form an MCM has been in existence for two decades. A bottom substrate is provided with copper pins in a conventional manner. Semiconductor dice are then flip-chip mounted to chip carrier substrates. An interposer physically and electrically couples a chip carrier substrate to another chip carrier or to the bottom substrate by way of solder joining the interconnections. These interconnections are located around the periphery of each substrate which could feasibly limit chip configuration and, therefore, chip density on each level. The copper pins of the PGAs and the interposers provide the stand-off between the carriers to keep them from collapsing onto each other.
Thus, power distribution, heat dissipation, and temperature, as well as testing, burn-in, and rework should all be taken into consideration in the successful design of MCMs. The difficulty in designing MCMs is finding and assembling materials with the right blend of electrical, mechanical, and thermal properties. Trade-offs are almost always required and typically depend on the application. A need exists for an easily manufacturable ultradense MCM which is cost effective as well as meeting all of the design criteria aforementioned.